[Question] How START’s design executes memory testing? All controller’s memories test together or one by one controller to do memory testing? About circuit design, do they have any different between parallel testing or serial testing?
[Answer] Testing engineer can assign all controller’s memories or single controller’s memories to do testing in testing command. In fact, testing command can assign particular controller, group or memory to do testing.
The circuits have a little different for parallel and serial testing design. If turn on parallel_on function in BFL setting, the send_command will add one more bit to define parallel testing or not.
START tool usage, BFL flow, BII flow, memory grouping, advanced application
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